Hybrid DPWM with process and temperature calibration
In this thesis, a 12-bit high resolution, power and area efficiency hybrid DPWM with process and temperature calibration is proposed for DPWM controller IC for DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential segmented tapped delay line structure and a 6-bit counter-compa...
| Published: |
|
|---|---|
| Online Access: | http://hdl.handle.net/2047/D20195190 |