Hardware implementation of image space reconstruction algorithm using FPGAS

• Online Access: http://hdl.handle.net/2047/d10008433

The Image Space Reconstruction Algorithm (ISRA) has been used in hyperspectral imaging applications to monitor changes in the environment and specifically, changes in coral reef, mangrove, and sand in coastal areas. This algorithm is one of a set of iterative methods used in the hyperspectral imaging area to estimate abundance. However, ISRA is highly computational, making it difficult to obtain results in a timely manner. We present the use of specialized hardware in the implementation of this algorithm, specifically the use of VHDL and FPGAs. The implementation of ISRA algorithm has been divided into hardware and software units. The hardware units were implemented on a Xilinx Virtex II Pro XC2VP30FPGA and the software was implemented on the Xilinx Microblaze soft processor . This case study illustrates the feasibility of this alternative design for iterative hyperspectral imaging algorithms. The main bottleneck found in this implementations was data transfer. In order to reduce or eliminate this bottleneck we introduced the use of block-rams (BRAMS) to buffer data and have data readily available to the ISRA algorithm.