Athermal photonic devices and circuits on a silicon platform
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2013. === This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. === Cataloged from student-submitted PDF ve...
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ndltd-MIT-oai-dspace.mit.edu-1721.1-799212019-05-02T16:28:36Z Athermal photonic devices and circuits on a silicon platform Raghunathan, Vivek Lionel C. Kimerling. Massachusetts Institute of Technology. Department of Materials Science and Engineering. Massachusetts Institute of Technology. Department of Materials Science and Engineering. Materials Science and Engineering. Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2013. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Cataloged from student-submitted PDF version of thesis. Includes bibliographical references (p. 153-166). In recent years, silicon based optical interconnects has been pursued as an eective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in signicant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the eect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiNx to hermetically seal the athermal. Further, we employ visible light for post-fabrication trimming of athermal rings by sandwiching a thin photosensitive layer of As2S3 in between amorphous Si core and polymer top cladding. System design of an add-drop filter requires an optimum combination of channel counts performance and power handling capacity for maximum aggregate bandwidth. We establish the superior performance of athermal add-drop filter compared to a standard silicon filter treating bandwidth as the figure-of-merit. by Vivek Raghunathan. Ph.D. 2013-08-22T17:21:26Z 2013-08-22T17:21:26Z 2013 2013 Thesis http://hdl.handle.net/1721.1/79921 855535308 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 166 p. application/pdf Massachusetts Institute of Technology |
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Materials Science and Engineering. Raghunathan, Vivek Athermal photonic devices and circuits on a silicon platform |
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2013. === This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. === Cataloged from student-submitted PDF version of thesis. === Includes bibliographical references (p. 153-166). === In recent years, silicon based optical interconnects has been pursued as an eective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in signicant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the eect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiNx to hermetically seal the athermal. Further, we employ visible light for post-fabrication trimming of athermal rings by sandwiching a thin photosensitive layer of As2S3 in between amorphous Si core and polymer top cladding. System design of an add-drop filter requires an optimum combination of channel counts performance and power handling capacity for maximum aggregate bandwidth. We establish the superior performance of athermal add-drop filter compared to a standard silicon filter treating bandwidth as the figure-of-merit. === by Vivek Raghunathan. === Ph.D. |
author2 |
Lionel C. Kimerling. |
author_facet |
Lionel C. Kimerling. Raghunathan, Vivek |
author |
Raghunathan, Vivek |
author_sort |
Raghunathan, Vivek |
title |
Athermal photonic devices and circuits on a silicon platform |
title_short |
Athermal photonic devices and circuits on a silicon platform |
title_full |
Athermal photonic devices and circuits on a silicon platform |
title_fullStr |
Athermal photonic devices and circuits on a silicon platform |
title_full_unstemmed |
Athermal photonic devices and circuits on a silicon platform |
title_sort |
athermal photonic devices and circuits on a silicon platform |
publisher |
Massachusetts Institute of Technology |
publishDate |
2013 |
url |
http://hdl.handle.net/1721.1/79921 |
work_keys_str_mv |
AT raghunathanvivek athermalphotonicdevicesandcircuitsonasiliconplatform |
_version_ |
1719041566862999552 |