A zero-crossing based pipelined analog-to-digital converter with supply voltage scalibility
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010. === Cataloged from PDF version of thesis. === Includes bibliographical references (p. 73-76). === A zero-crossing based pipelined analog-to-digital converter (ADC) has been designed and...
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2011
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| Online Access: | http://hdl.handle.net/1721.1/62446 |
| Summary: | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010. === Cataloged from PDF version of thesis. === Includes bibliographical references (p. 73-76). === A zero-crossing based pipelined analog-to-digital converter (ADC) has been designed and is fabricated in a 65nm CMOS process. The highly digital implementation characteristic of the zero-crossing detection technique enables energy efficient operation and voltage scaling. Supply voltage scaling based on the required sampling frequency and resolution provides high energy efficiency over a wide range of sampling frequencies and resolutions. A two phase charge transfer scheme (course charge transfer and fine charge transfer) is used to achieve high speed and high resolution. Using switched capacitor circuit, two phase charge transfer scheme is implemented without increasing power and circuit complexity. === by Sunghyuk Lee. === S.M. |
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