A timeshared, runtime reconfigurable hardware co-processing architecture
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009. === Includes bibliographical references (leaves 73-74). === The constant desire for increased performance in microprocessor systems has led to the need for specialized hardware cores...
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2010
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| Online Access: | http://hdl.handle.net/1721.1/53147 |