Maps : a compiler-managed memory system for software-exposed architectures

Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000. === Includes bibliographical references (p. 155-161). === Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticate...

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Main Author: Barua, Rajeev K. (Rajeev Kumar)
Other Authors: Saman Amarasinghe and Anant Agarwal.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2007
Subjects:
Online Access:http://hdl.handle.net/1721.1/37194
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spelling ndltd-MIT-oai-dspace.mit.edu-1721.1-371942019-05-02T16:10:07Z Maps : a compiler-managed memory system for software-exposed architectures Compiler-managed memory system for software-exposed architectures Barua, Rajeev K. (Rajeev Kumar) Saman Amarasinghe and Anant Agarwal. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000. Includes bibliographical references (p. 155-161). Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, improvements in memory parallelism in microprocessors have lagged behind. This thesis explains why memory parallelism is hard to exploit in microprocessors and advocate bank-exposed architectures as an effective way to exploit more memory parallelism. Bank exposed architectures are a kind of software-exposed architecture: one in which the low level details of the hardware are visible to the software. In a bank-exposed architecture, the memory banks are visible to the software, enabling the compiler to exploit a high degree of memory parallelism in addition to ILP. Bank-exposed architectures can be employed by general-purpose processors, and by embedded chips, such as those used for digital-signal processing. This thesis presents Maps, an enabling compiler technology for bank-exposed architectures. Maps solves the problem of bank-disambiguation, i.e., how to distribute data in sequential programs among several banks to best exploit memory parallelism, while retaining the ability to disambiguate each data reference to a particular bank. Two methods for bank disambiguation are presented: equivalence-class unification and modulo unrolling. Taking a sequential program as input, a bank-disambiguation method produces two outputs: first, a distribution of each program object among the memory banks; and second, a bank number for every reference that can be proven to access a single, known bank for that data distribution. Finally, the thesis shows why non-disambiguated accesses are sometimes desirable. Dependences between disambiguated and non-disambiguated accesses are enforced through explicit synchronization and software serial ordering. The MIT Raw machine is an example of a software-exposed architecture. Raw exposes its ILP, memory and communication mechanisms. The Maps system has been implemented in the Raw compiler. Results on Raw using sequential codes demonstrate that using bank disambiguation in addition to ILP improves performance by a factor of 3 to 5 over using ILP alone. by Rajeev Barua. Ph.D. 2007-04-20T15:46:19Z 2007-04-20T15:46:19Z 2000 2000 Thesis http://hdl.handle.net/1721.1/37194 45147649 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 161 p. application/pdf Massachusetts Institute of Technology
collection NDLTD
language English
format Others
sources NDLTD
topic Electrical Engineering and Computer Science.
spellingShingle Electrical Engineering and Computer Science.
Barua, Rajeev K. (Rajeev Kumar)
Maps : a compiler-managed memory system for software-exposed architectures
description Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000. === Includes bibliographical references (p. 155-161). === Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, improvements in memory parallelism in microprocessors have lagged behind. This thesis explains why memory parallelism is hard to exploit in microprocessors and advocate bank-exposed architectures as an effective way to exploit more memory parallelism. Bank exposed architectures are a kind of software-exposed architecture: one in which the low level details of the hardware are visible to the software. In a bank-exposed architecture, the memory banks are visible to the software, enabling the compiler to exploit a high degree of memory parallelism in addition to ILP. Bank-exposed architectures can be employed by general-purpose processors, and by embedded chips, such as those used for digital-signal processing. This thesis presents Maps, an enabling compiler technology for bank-exposed architectures. Maps solves the problem of bank-disambiguation, i.e., how to distribute data in sequential programs among several banks to best exploit memory parallelism, while retaining the ability to disambiguate each data reference to a particular bank. Two methods for bank disambiguation are presented: equivalence-class unification and modulo unrolling. Taking a sequential program as input, a bank-disambiguation method produces two outputs: first, a distribution of each program object among the memory banks; and second, a bank number for every reference that can be proven to access a single, known bank for that data distribution. Finally, the thesis shows why non-disambiguated accesses are sometimes desirable. Dependences between disambiguated and non-disambiguated accesses are enforced through explicit synchronization and software serial ordering. The MIT Raw machine is an example of a software-exposed architecture. Raw exposes its ILP, memory and communication mechanisms. The Maps system has been implemented in the Raw compiler. Results on Raw using sequential codes demonstrate that using bank disambiguation in addition to ILP improves performance by a factor of 3 to 5 over using ILP alone. === by Rajeev Barua. === Ph.D.
author2 Saman Amarasinghe and Anant Agarwal.
author_facet Saman Amarasinghe and Anant Agarwal.
Barua, Rajeev K. (Rajeev Kumar)
author Barua, Rajeev K. (Rajeev Kumar)
author_sort Barua, Rajeev K. (Rajeev Kumar)
title Maps : a compiler-managed memory system for software-exposed architectures
title_short Maps : a compiler-managed memory system for software-exposed architectures
title_full Maps : a compiler-managed memory system for software-exposed architectures
title_fullStr Maps : a compiler-managed memory system for software-exposed architectures
title_full_unstemmed Maps : a compiler-managed memory system for software-exposed architectures
title_sort maps : a compiler-managed memory system for software-exposed architectures
publisher Massachusetts Institute of Technology
publishDate 2007
url http://hdl.handle.net/1721.1/37194
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