Wire delay models for global placement of ASICs
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002. === Includes bibliographical references (leaves 28-29). === This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives an...
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| Format: | Others |
| Language: | English |
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Massachusetts Institute of Technology
2005
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| Online Access: | http://hdl.handle.net/1721.1/16855 |