Body coupled communication : the channel and implementation

Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. === Cataloged from PDF version of thesis. === Includes bibliographical references (pages 121-124). === To achieve comfortable form factors for wearable wireless medical devices, ba...

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Bibliographic Details
Main Author: Anderson, Grant Seaman
Other Authors: Charles G. Sodini.
Format: Others
Language:English
Published: Massachusetts Institute of Technology 2017
Subjects:
Online Access:http://hdl.handle.net/1721.1/111874
Description
Summary:Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. === Cataloged from PDF version of thesis. === Includes bibliographical references (pages 121-124). === To achieve comfortable form factors for wearable wireless medical devices, battery size, and thus power consumption, must be curtailed. Often the largest power consumption for wireless medical devices is storing or transmitting acquired data. Body area networks (BAN) can alleviate power budgets by using low power transmitters to send data locally around the body to receivers that are on areas of the body that allow for larger form factors, like the wrist or the waist. Body coupled communication (BCC) has been shown to have great potential in forming a BAN. This work expands the potential of BCC BANs by showing that BCC can include implanted nodes. Implants being able to implement BCC is an impactful discovery as previous BCC channel models have implicitly stated that BCC cannot work with implants. This discovery will allow BANs that include implants, such as pacemakers, to utilize the power efficiency of BCC. This thesis will give an introduction to BANs and BCC. It will further detail three contributions to BCC and its implementation. The three contributions are: 1) an excellent understanding of the BCC channel, that is verified by careful measurements, 2) a new amplifier circuit that improves the signal to interferer ratio, and 3) an asynchronous digital communication scheme that offers a high data rate and low power implementation. An integrated transmitter and receiver were fabricated in a 0.18 pm CMOS process. The results of the three contributions as implemented in the integrated chips are also presented and discussed. The integrated receiver was able to receive information at 16 Mbps, while consuming 5.9 mW, yielding an energy use of 367 pJ/bit. The integrated transmitter was able to transmit information at 30 Mbps, while consuming 4.32 mW, yielding an energy use of 114 pJ/bit. === by Grant Seaman Anderson. === Ph. D.