GCS : a framework for distributed verilog simulation
The verification of VLSI circuits, which are ever increasing in size and complexity, is bottlenecked during simulation within the circuit design process. Distributed simulation on a cluster of workstations or a shared memory multiple processor computer attempts a cost-effective solution. The key...
| Main Author: | |
|---|---|
| Format: | Others |
| Language: | en |
| Published: |
McGill University
2005
|
| Subjects: | |
| Online Access: | http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=82404 |