| Summary: | The verification of VLSI circuits, which are ever increasing in size and complexity, is bottlenecked during simulation within the circuit design process. Distributed simulation on a cluster of workstations or a shared memory multiple processor computer attempts a cost-effective solution. The key factor in performance of these simulations is the development of distributed simulation algorithms that make use of the circuits' underlying properties. === This study presents the design and implementation of a distributed simulation framework to better produce and test simulation algorithms. The framework includes a technique to generate circuits, since large commercial circuits are hard to obtain, a Verilog compiler, and a simulator template to ease implementation.
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