An efficient single-latch scan-design scheme/
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McGill University
1985
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ndltd-LACETR-oai-collectionscanada.gc.ca-QMM.632662014-02-13T04:04:27ZAn efficient single-latch scan-design scheme/Panda, Uma R.Logic circuits -- Testing.Integrated circuits -- Very large scale integration -- Testing.McGill University1985Electronic Thesis or Dissertationapplication/pdfenalephsysno: 000221395proquestno: AAIML21668Theses scanned by UMI/ProQuest.All items in eScholarship@McGill are protected by copyright with all rights reserved unless otherwise indicated.Master of Engineering (Department of Electrical Engineering.) http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63266 |
collection |
NDLTD |
language |
en |
format |
Others
|
sources |
NDLTD |
topic |
Logic circuits -- Testing. Integrated circuits -- Very large scale integration -- Testing. |
spellingShingle |
Logic circuits -- Testing. Integrated circuits -- Very large scale integration -- Testing. Panda, Uma R. An efficient single-latch scan-design scheme/ |
author |
Panda, Uma R. |
author_facet |
Panda, Uma R. |
author_sort |
Panda, Uma R. |
title |
An efficient single-latch scan-design scheme/ |
title_short |
An efficient single-latch scan-design scheme/ |
title_full |
An efficient single-latch scan-design scheme/ |
title_fullStr |
An efficient single-latch scan-design scheme/ |
title_full_unstemmed |
An efficient single-latch scan-design scheme/ |
title_sort |
efficient single-latch scan-design scheme/ |
publisher |
McGill University |
publishDate |
1985 |
url |
http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63266 |
work_keys_str_mv |
AT pandaumar anefficientsinglelatchscandesignscheme AT pandaumar efficientsinglelatchscandesignscheme |
_version_ |
1716644704863387648 |