Modeling and verification of DSP designs in HOL
In this thesis we propose a framework for the incorporation of formal methods in the design flow of DSP (Digital Signal Processing) systems in a rigorous way. In the proposed approach we model and verify DSP descriptions at different abstraction levels using higher-order logic based on the HOL (High...
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| Format: | Others |
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2005
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| Online Access: | http://spectrum.library.concordia.ca/8433/1/NR04055.pdf Akbarpour, Behzad <http://spectrum.library.concordia.ca/view/creators/Akbarpour=3ABehzad=3A=3A.html> (2005) Modeling and verification of DSP designs in HOL. PhD thesis, Concordia University. |