Reducing the Area and Energy of Coherence Directories in Multicore Processors
A key challenge in architecting a multicore processor is efficiently maintaining cache coherence. Directory protocols offer a scalable, bandwidth-efficient solution to this problem, but unfortunately they incur significant area overheads. This dissertation proposes three novel coherence directory d...
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| Language: | en_ca |
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2013
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| Online Access: | http://hdl.handle.net/1807/43768 |