Optimization and Modeling of FPGA Circuitry in Advanced Process Technology
We develop a new fully-automated transistor sizing tool for FPGAs that features area, delay and wire load modeling enhancements over prior work to improve its accuracy in advanced process nodes. We then use this tool to investigate a number of FPGA circuit design related questions in a 22nm process....
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| Language: | en_ca |
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2013
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| Online Access: | http://hdl.handle.net/1807/42733 |