Instruction-set-simulator-less Virtual Prototype Framework for Embedded Software Development

• Main Author: Ni, Nick
• Other Authors: Zhu, Jianwen
• Language: en_ca
• Published: 2011
• Subjects: Embedded System; Embedded Software; Virtual Prototype; SoC; ISS; C model; HAL; API; 0984
• Online Access: http://hdl.handle.net/1807/31367

With continuous advancement in silicon technology and high feature demands on consumer electronics, the complexity of embedded software has led the software development effort to dominate System-On-Chip (SoC) design. Virtual Prototype (VP) addresses the problem by enabling early software development before hardware arrival. However, VP still poses challenges: 1) Instruction Set Simulator (ISS) degrades simulation time, 2) Development is restricted to embedded processor specific tools and 3) Applications and drivers are dependent on system software completion. In this work, we propose an abstraction framework which: 1) Removes ISS from VP, achieving native host software execution time, 2) Activates rich suites of desktop development tools in host by compiling embedded software in host binary and 3) Allows system software independent application and driver development. With this framework, we successfully demonstrated up to 2000% speed-up in VP run-time over conventional VP and improved software development productivity significantly.