Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters

Mismatch Calibration of Time-Interleaved Digital-to-Analog Converters

This thesis presents a stable technique for distribution of data in Time Interleaved Digital-to-Analog Converters (TIDAC) that allows usage of the entire Nyquist bandwidth. The data distribution uses a Thiran all-pass filter to ensure stability and preserve the phase in the bandwidth of interest. Al...

Full description

Bibliographic Details
Main Author:	D'souza, Rowena Joan
Language:	en
Published:	2010
Subjects:	Digital-to-analog converters Time-interleaving
Online Access:	http://hdl.handle.net/10222/12994

Similar Items

A Low Jitter Analog Circuit for Precisely Correcting Timing Skews in Time Interleaved Analog-to-Digital Converters
by: Bray, Adam
Published: (2013)

Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters
by: Shirtliff, Jason Neil
Published: (2010)

Clock Edge Timing Adjustment Techniques for Correction of Timing Mismatches in Interleaved Analog-to-Digital Converters
by: Shirtliff, Jason Neil
Published: (2010)

All Digital, Background Calibration for Time-Interleaved and Successive Approximation Register Analog-to-Digital Converters
by: David, Christopher Leonidas
Published: (2010)

All-Digital Background Calibration Technique for Offset, Gain and Timing Mismatches in Time-Interleaved ADCs
by: Van-Thanh Ta, et al.
Published: (2019-10-01)

Interchannel Mismatch Calibration Techniques for Time-Interleaved SAR ADCs
by: Mojtaba Bagheri, et al.
Published: (2021-01-01)

A Calibration Method for Nonlinear Mismatches in M-Channel Time-Interleaved Analog-to-Digital Converters Based on Hadamard Sequences
by: Husheng Liu, et al.
Published: (2016-11-01)

A 16-b 10Msample/s Split-Interleaved Analog to Digital Converter
by: Croughwell, Rosamaria
Published: (2007)

Estimation and Correction of Gain Mismatch and Timing Error in Time-Interleaved ADCs Based on DFT
by: Guo Lianping, et al.
Published: (2014-08-01)

Flexible Sigma Delta Time-Interleaved Bandpass Analog-to-Digital Converter
by: McGinnis, Ryan Edward
Published: (2006)

Live Demonstration of Mismatch Compensation for Time-Interleaved ADCs
by: Nilsson, Johan, et al.
Published: (2012)

A 5 GS/s 29 mW Interleaved SAR ADC With 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications
by: Mingqiang Guo, et al.
Published: (2020-01-01)

The design of a calibration-free multiplying digital-to-analog converter
by: Guenther, Edgar Theodore, 1941-
Published: (1972)

High-Speed Low-Power Analog to Digital Converter for Digital Beam Forming Systems
Published: (2017)

A 12-Bit 2.4 GS/s Four-Channel Pipelined ADC with a Novel On-Chip Timing Mismatch Calibration
by: Hanbo Jia, et al.
Published: (2020-05-01)

A promising optoelectronic clock solution for  time-interleaved ADC
by: Zhongying Wu, et al.
Published: (2014-12-01)

A Behavioral Dynamic Nonlinear Model for Time-Interleaved ADC Based on Volterra Series
by: Wentao Wei, et al.
Published: (2019-01-01)

Non-binary capacitor array calibration for a high performance successive approximation analog-to-digital converter
by: Gan, Jianhua
Published: (2008)

High speed floating analog to digital converter and interpolating digital to analog converter.
Published: (2001)

A Novel Fully Digital Feedforward Background Calibration Technique for Timing Mismatch in M-Channel Time-Interleaved ADCs
by: Dong, Y., et al.
Published: (2023)

Oversampling digital-to-analog converters
by: Shu, Shaofeng
Published: (2012)

An incremental analog-to-digital converter
by: Williamson, Frank Robert
Published: (2007)

A background calibration technique and self testing method for the pipeline analog to digital converter
by: Yoo, Jae Ki
Published: (2008)

Architecture Alternatives for Time-interleaved and Input-feedforward Delta-Sigma Modulators
by: Gharbiya, Ahmed
Published: (2008)

Architecture Alternatives for Time-interleaved and Input-feedforward Delta-Sigma Modulators
by: Gharbiya, Ahmed
Published: (2008)

Time-based oversampled analog-to-digital converters in nano-scale integrated circuits
by: Jung, Woo Young
Published: (2015)

Analysis and design of oversampled digital-to-analog converters
by: Xu, Xiaofeng
Published: (2013)

Current-mode flash analog-to-digital converter
by: Maleki, Mohammad
Published: (2013)

Calibration for Sample-And-Hold Mismatches in M-Channel TIADCs Based on Statistics
by: Xiangyu Liu, et al.
Published: (2019-01-01)

Design of analog-to-digital converters with binary search algorithm and digital calibration techniques
by: Wong, Si Seng
Published: (2011)

Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems
by: Kiho Seong, et al.
Published: (2020-04-01)

A 12-b 50Msample/s Pipeline Analog to Digital Converter
by: Carter, Nathan R
Published: (2000)

A subranging analog to digital converter using four bit pipepline
by: Press, Stephen E.
Published: (2013)

Modeling and Implementation of Current-Steering Digital-to-Analog Converters
by: Andersson, Ola
Published: (2005)

A 4-bit 36 GS/s ADC with 18 GHz Analog Bandwidth in 40 nm CMOS Process
by: Hanbo Jia, et al.
Published: (2020-10-01)

FOUR PHASE INTERLEAVED BOOST CONVERTER - ANALYFOUR PHASE INTERLEAVED BOOST CONVERTER - ANALYSIS AND VERIFICATIONSIS AND VERIFICATION
by: Slavomir KASCAK, et al.
Published: (2018-03-01)

A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing
by: Ahmed Elgreatly, et al.
Published: (2020-12-01)

An IF input continuous-time sigma-delta analog-digital converter with high image rejection.
Published: (2004)

An Interleaved Phase-Shift Full-Bridge Converter with Dynamic Dead Time Control for Server Power Applications
by: Jia-You Lee, et al.
Published: (2021-02-01)

Design of high speed folding and interpolating analog-to-digital converter
by: Li, Yunchu
Published: (2004)

Cannot write session to /tmp/vufind_sessions/sess_1a0f0e305c5amn4pv741ad4091