JTAG sąsaja programuojamuose elektroniniuose prietaisuose
This master‘s final paper describes JTAG (boundary scan) interface in which discuss IEEE standart 1149.1 circuit model and the main TAP (Test Access Port) controllers instructions. Accomplished programmable integral logical ICs overview: development, leading manufacturer (ALTERA, XILINX, ACTEL) prod...
Main Author: | |
---|---|
Other Authors: | |
Format: | Dissertation |
Language: | Lithuanian |
Published: |
Lithuanian Academic Libraries Network (LABT)
2005
|
Subjects: | |
Online Access: | http://vddb.library.lt/fedora/get/LT-eLABa-0001:E.02~2005~D_20050615_150741-49753/DS.005.0.01.ETD |
id |
ndltd-LABT_ETD-oai-elaba.lt-LT-eLABa-0001-E.02~2005~D_20050615_150741-49753 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-LABT_ETD-oai-elaba.lt-LT-eLABa-0001-E.02~2005~D_20050615_150741-497532014-01-17T03:45:42Z2005-06-15litElectronics and Electrical EngineeringVismantas, TomasJTAG sąsaja programuojamuose elektroniniuose prietaisuoseJTAG interface of programmable elektronic devicesLithuanian Academic Libraries Network (LABT)This master‘s final paper describes JTAG (boundary scan) interface in which discuss IEEE standart 1149.1 circuit model and the main TAP (Test Access Port) controllers instructions. Accomplished programmable integral logical ICs overview: development, leading manufacturer (ALTERA, XILINX, ACTEL) production and programmable equipment evaluation. Represented recomendation, how we can pick suitable programmable logical device. The paper presents detailed describe searching ICs family XC9500 characteristic, features and merits. In general terms presented programmable logic language VHDL value. It also produces some detailed compose describes of the project, using methods of circuit drawing and VHDL language. Master‘s hypothesis that if we will use JTAG interface processed logical programmable instrumentation in our projects we can save up time, area and improve their quality is confirmed. This is prospective technology which also soon will be in use in Lithuania.Programmable logicProgramuojama logikaJTAGMaster thesisDaunys, GintautasLaurutis, RemigijusLaurutis, VincasLauruška, VidasBuinevičius, Vytautas AlgimantasSiauliai UniversitySiauliai Universityhttp://vddb.library.lt/obj/LT-eLABa-0001:E.02~2005~D_20050615_150741-49753LT-eLABa-0001:E.02~2005~D_20050615_150741-49753SU-LABT20050615-150741-49753http://vddb.library.lt/fedora/get/LT-eLABa-0001:E.02~2005~D_20050615_150741-49753/DS.005.0.01.ETDUnrestrictedapplication/pdf |
collection |
NDLTD |
language |
Lithuanian |
format |
Dissertation |
sources |
NDLTD |
topic |
Electronics and Electrical Engineering Programmable logic Programuojama logika JTAG |
spellingShingle |
Electronics and Electrical Engineering Programmable logic Programuojama logika JTAG Vismantas, Tomas JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
description |
This master‘s final paper describes JTAG (boundary scan) interface in which discuss IEEE standart 1149.1 circuit model and the main TAP (Test Access Port) controllers instructions. Accomplished programmable integral logical ICs overview: development, leading manufacturer (ALTERA, XILINX, ACTEL) production and programmable equipment evaluation. Represented recomendation, how we can pick suitable programmable logical device. The paper presents detailed describe searching ICs family XC9500 characteristic, features and merits. In general terms presented programmable logic language VHDL value. It also produces some detailed compose describes of the project, using methods of circuit drawing and VHDL language. Master‘s hypothesis that if we will use JTAG interface processed logical programmable instrumentation in our projects we can save up time, area and improve their quality is confirmed. This is prospective technology which also soon will be in use in Lithuania. |
author2 |
Daunys, Gintautas |
author_facet |
Daunys, Gintautas Vismantas, Tomas |
author |
Vismantas, Tomas |
author_sort |
Vismantas, Tomas |
title |
JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
title_short |
JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
title_full |
JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
title_fullStr |
JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
title_full_unstemmed |
JTAG sąsaja programuojamuose elektroniniuose prietaisuose |
title_sort |
jtag sąsaja programuojamuose elektroniniuose prietaisuose |
publisher |
Lithuanian Academic Libraries Network (LABT) |
publishDate |
2005 |
url |
http://vddb.library.lt/fedora/get/LT-eLABa-0001:E.02~2005~D_20050615_150741-49753/DS.005.0.01.ETD |
work_keys_str_mv |
AT vismantastomas jtagsasajaprogramuojamuoseelektroniniuoseprietaisuose AT vismantastomas jtaginterfaceofprogrammableelektronicdevices |
_version_ |
1716625087522668544 |