Random Local Delay Variability : On-chip Measurement And Modeling

Random Local Delay Variability : On-chip Measurement And Modeling

This thesis focuses on random local delay variability measurement and its modeling. It explains a circuit technique to measure the individual logic gate delay in silicon to study within-die variation. It also suggests a Process, Voltage and Temperature (PVT)-aware gate delay model for voltage and te...

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Bibliographic Details
Main Author: Das, Bishnu Prasad
Other Authors: Amrutur, Bharadwaj
Language:en_US
Published: 2011
Subjects:
Electronic Gates - Design
On-chip Management And Construction
Electronic Gate Delay - Modeling
Random Local Delay Variation
On-chip Gate Delay Measurement
Process Voltage And Temperature Gate Delay Model
Electronic Gate Delay - Measurement
Statistical Static Timing Analysis (SSTA)
Gate Delay Variability Measurement
Delay Variability
On-chip Measurement
Gate Delay Models
Electronic Engineering
Online Access:http://hdl.handle.net/2005/1008

Internet

http://hdl.handle.net/2005/1008

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