Analysis, Diagnosis and Design for System-level Signal and Power Integrity in Chip-package-systems

Analysis, Diagnosis and Design for System-level Signal and Power Integrity in Chip-package-systems

The Internet of Things (IoT) has ushered in an age where low-power sensors generate data which are communicated to a back-end cloud for massive data computation tasks. From the hardware perspective this implies co-existence of several power-efficient sub-systems working harmoniously at the sensor no...

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Bibliographic Details
Main Author: Ambasana, Nikita
Other Authors: Gope, Dipanjan
Language:en_US
Published: 2018
Subjects:
Power Integrity
Chip Package System
Package-bond System Level Design
Least Square Support Vector Machines (LS-SVM)
S-Parameters
Learning Based Models
Power Integrity Design
Chip-Package-Systems
Electrical Communication
Online Access:http://etd.iisc.ernet.in/2005/3609
http://etd.iisc.ernet.in/abstracts/4478/G28445-Abs.pdf

Internet

http://etd.iisc.ernet.in/2005/3609
http://etd.iisc.ernet.in/abstracts/4478/G28445-Abs.pdf

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