Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology

Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology

Process variability is a major challenge for the design of nano scale MOSFETs due to fundamental physical limits as well as process control limitations. As the size of the devices is scales down to improve performance, the circuit becomes more sensitive to the process variations. Thus, it is necessa...

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Bibliographic Details
Main Author: Ajayan, K R
Other Authors: Bhat, Navakanta
Language:en_US
Published: 2018
Subjects:
Metal Oxide Semiconductors (MOS)
Digital Integrated Circuits
Complementary Metal Oxide Semiconductors (CMOS)
N-type Metal-Oxide Semiconductors (NMOS)
P-type Metal-Oxide Semiconductors (PMOS)
Metal Oxode Semiconductor Device Modeling
Look Up Table Model (LUT)
Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET)
MOSFET Models
BSIM Models
Variability Aware Device Modeling
Integrated Circuit Modeling
Circuit Design
45nm Analog CMOS Technology
Electrical Communication Engineering
Online Access:http://etd.iisc.ernet.in/2005/3516
http://etd.iisc.ernet.in/abstracts/4383/G26726-Abs.pdf

Internet

http://etd.iisc.ernet.in/2005/3516
http://etd.iisc.ernet.in/abstracts/4383/G26726-Abs.pdf

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