Um mecanismo integrado de cache e prefetching para sistemas de entrada e saída de alto desempenho.
Made available in DSpace on 2016-06-02T19:05:31Z (GMT). No. of bitstreams: 1 DissED.pdf: 797835 bytes, checksum: 2cb1cf03ad0e87b75038c325d0b2f91c (MD5) Previous issue date: 2004-02-26 === Universidade Federal de Sao Carlos === An integrated caching and prefetching mechanism for a parallel network...
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| Format: | Others |
| Language: | Portuguese |
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Universidade Federal de São Carlos
2016
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| Online Access: | https://repositorio.ufscar.br/handle/ufscar/383 |