Hierarchical power optimization for ultra low-power digital systems

Bibliographic Details
Main Author: Choi, Kyu-Won
Format: Others
Language:en_US
Published: Georgia Institute of Technology 2005
Subjects:
Online Access:http://hdl.handle.net/1853/5396
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spelling ndltd-GATECH-oai-smartech.gatech.edu-1853-53962013-01-07T20:11:22ZHierarchical power optimization for ultra low-power digital systemsChoi, Kyu-WonLow voltage integrated circuitsMetal oxide semiconductorsPower electronicsComplementaryGeorgia Institute of Technology2005-03-10T18:40:43Z2005-03-10T18:40:43Z2003-12-01Dissertation3245337 bytesapplication/pdfhttp://hdl.handle.net/1853/5396en_US
collection NDLTD
language en_US
format Others
sources NDLTD
topic Low voltage integrated circuits
Metal oxide semiconductors
Power electronics
Complementary
spellingShingle Low voltage integrated circuits
Metal oxide semiconductors
Power electronics
Complementary
Choi, Kyu-Won
Hierarchical power optimization for ultra low-power digital systems
author Choi, Kyu-Won
author_facet Choi, Kyu-Won
author_sort Choi, Kyu-Won
title Hierarchical power optimization for ultra low-power digital systems
title_short Hierarchical power optimization for ultra low-power digital systems
title_full Hierarchical power optimization for ultra low-power digital systems
title_fullStr Hierarchical power optimization for ultra low-power digital systems
title_full_unstemmed Hierarchical power optimization for ultra low-power digital systems
title_sort hierarchical power optimization for ultra low-power digital systems
publisher Georgia Institute of Technology
publishDate 2005
url http://hdl.handle.net/1853/5396
work_keys_str_mv AT choikyuwon hierarchicalpoweroptimizationforultralowpowerdigitalsystems
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