Formal verification of control software
In a context of heightened requirements for safety-critical embedded systems and ever-increasing costs of verification and validation, this research proposes to advance the state of formal analysis for control software. Formal methods are a field of computer science that uses mathematical techniques...
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| Format: | Others |
| Language: | en_US |
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Georgia Institute of Technology
2015
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| Online Access: | http://hdl.handle.net/1853/53841 |