Fatigue modeling of nano-structured chip-to-package interconnections
Driven by the need for increase in system¡¯s functionality and decrease in the feature size, International Technology Roadmap for Semi-conductors has predicted that integrated chip packages will have interconnections with I/O pitch of 90 nm by the year 2018. Lead-based solder materials that have be...
Main Author: | |
---|---|
Published: |
Georgia Institute of Technology
2009
|
Subjects: | |
Online Access: | http://hdl.handle.net/1853/28263 |
id |
ndltd-GATECH-oai-smartech.gatech.edu-1853-28263 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-GATECH-oai-smartech.gatech.edu-1853-282632013-01-07T20:31:39ZFatigue modeling of nano-structured chip-to-package interconnectionsKoh, Sau W.Molecular dynamicsCopperFatigueInterconnects (Integrated circuit technology)Nanostructured materials FatigueNanocrystalsCopperComputer simulationDriven by the need for increase in system¡¯s functionality and decrease in the feature size, International Technology Roadmap for Semi-conductors has predicted that integrated chip packages will have interconnections with I/O pitch of 90 nm by the year 2018. Lead-based solder materials that have been used for many decades will not be able to satisfy the thermal mechanical requirements of these fines pitch packages. Of all the known interconnect technologies, nanostructured copper interconnects are the most promising for meeting the high performance requirements of next generation devices. However, there is a need to understand their material properties, deformation mechanisms and microstructural stability. The goal of this research is to study the mechanical strength and fatigue behavior of nanocrystalline copper using atomistic simulations and to evaluate their performance as nanostructured interconnect materials. The results from the crack growth analysis indicate that nanocrystalline copper is a suitable candidate for ultra-fine pitch interconnects applications. This study has also predicts that crack growth is a relatively small portion of the total fatigue life of interconnects under LCF conditions. The simulations result conducted on the single crystal copper nano-rods show that its main deformation mechanism is the nucleation of dislocations. In the case of nanocrystalline copper, material properties such as elastic modulus and yield strength have been found to be dependent on the grain size. Furthermore, it has been shown that there is competition between the dislocation activity and grain boundary sliding as the main deformation mode This research has shown that stress induced grain coarsening is the main reason for loss of mechanical performance of nanocrystalline copper during cyclic loading. Further, the simulation results have also shown that grain growth during fatigue loading is assisted by the dislocation activity and grain boundary migration. A fatigue model for nanostructured interconnects has been developed in this research using the above observations Lastly, simulations results have shown that addition of the antimony into nanocrystalline copper will not only increase the microstructure stability, it will also increase its strength.Georgia Institute of Technology2009-06-08T19:34:08Z2009-06-08T19:34:08Z2009-01-09Dissertationhttp://hdl.handle.net/1853/28263 |
collection |
NDLTD |
sources |
NDLTD |
topic |
Molecular dynamics Copper Fatigue Interconnects (Integrated circuit technology) Nanostructured materials Fatigue Nanocrystals Copper Computer simulation |
spellingShingle |
Molecular dynamics Copper Fatigue Interconnects (Integrated circuit technology) Nanostructured materials Fatigue Nanocrystals Copper Computer simulation Koh, Sau W. Fatigue modeling of nano-structured chip-to-package interconnections |
description |
Driven by the need for increase in system¡¯s functionality and decrease in the feature size, International Technology Roadmap for Semi-conductors has predicted that integrated chip packages will have interconnections with I/O pitch of 90 nm by the year 2018. Lead-based solder materials that have been used for many decades will not be able to satisfy the thermal mechanical requirements of these fines pitch packages. Of all the known interconnect technologies, nanostructured copper interconnects are the most promising for meeting the high performance requirements of next generation devices. However, there is a need to understand their material properties, deformation mechanisms and microstructural stability. The goal of this research is to study the mechanical strength and fatigue behavior of nanocrystalline copper using atomistic simulations and to evaluate their performance as nanostructured interconnect materials.
The results from the crack growth analysis indicate that nanocrystalline copper is a suitable candidate for ultra-fine pitch interconnects applications. This study has also predicts that crack growth is a relatively small portion of the total fatigue life of interconnects under LCF conditions.
The simulations result conducted on the single crystal copper nano-rods show that its main deformation mechanism is the nucleation of dislocations. In the case of nanocrystalline copper, material properties such as elastic modulus and yield strength have been found to be dependent on the grain size. Furthermore, it has been shown that there is competition between the dislocation activity and grain boundary sliding as the main deformation mode
This research has shown that stress induced grain coarsening is the main reason for loss of mechanical performance of nanocrystalline copper during cyclic loading. Further, the simulation results have also shown that grain growth during fatigue loading is assisted by the dislocation activity and grain boundary migration. A fatigue model for nanostructured interconnects has been developed in this research using the above observations
Lastly, simulations results have shown that addition of the antimony into nanocrystalline copper will not only increase the microstructure stability, it will also increase its strength. |
author |
Koh, Sau W. |
author_facet |
Koh, Sau W. |
author_sort |
Koh, Sau W. |
title |
Fatigue modeling of nano-structured chip-to-package interconnections |
title_short |
Fatigue modeling of nano-structured chip-to-package interconnections |
title_full |
Fatigue modeling of nano-structured chip-to-package interconnections |
title_fullStr |
Fatigue modeling of nano-structured chip-to-package interconnections |
title_full_unstemmed |
Fatigue modeling of nano-structured chip-to-package interconnections |
title_sort |
fatigue modeling of nano-structured chip-to-package interconnections |
publisher |
Georgia Institute of Technology |
publishDate |
2009 |
url |
http://hdl.handle.net/1853/28263 |
work_keys_str_mv |
AT kohsauw fatiguemodelingofnanostructuredchiptopackageinterconnections |
_version_ |
1716475107237429248 |