Instruction Timing Analysis for Linux/x86-based Embedded and Desktop Systems
Real-time aspects are becoming more important in standard desktop PC environments and x86 based processors are being utilized in embedded systems more often. While these processors were not created for use in hard real time systems, they are fast and inexpensive and can be used if it is possible to...
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| Format: | Dissertation |
| Language: | English |
| Published: |
Universitätsbibliothek Chemnitz
2005
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| Online Access: | http://nbn-resolving.de/urn:nbn:de:swb:ch1-200501401 http://nbn-resolving.de/urn:nbn:de:swb:ch1-200501401 http://www.qucosa.de/fileadmin/data/qucosa/documents/5062/data/index.html http://www.qucosa.de/fileadmin/data/qucosa/documents/5062/data/diploma_thesis-tojo.pdf http://www.qucosa.de/fileadmin/data/qucosa/documents/5062/data/diploma_thesis-tojo.ps.gz http://www.qucosa.de/fileadmin/data/qucosa/documents/5062/20050140.txt |
| Summary: | Real-time aspects are becoming more important in
standard desktop PC environments and x86 based
processors are being utilized in embedded systems
more often.
While these processors were not created for use
in hard real time systems, they are fast and
inexpensive and can be used if it is possible
to determine the worst case execution time.
Information on CPU caches (L1, L2) and
branch prediction architecture is necessary
to simulate best and worst cases in execution
timing, but is often not detailed
enough and sometimes not published at all.
This document describes how the underlying
hardware can be analysed to obtain
this information. |
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