Performance analysis and optimization of asynchronous circuits

Analytical techniques are developed to determine the performance of asynchronous digital circuits. These techniques can be used to guide the designer during the synthesis of such a circuit, leading to a high-performance, efficient implementation. Optimization techniques are also developed that furth...

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Bibliographic Details
Main Author: Burns, Steven Morgan
Format: Others
Language:en
Published: 1991
Online Access:https://thesis.library.caltech.edu/2835/1/Burns_sm_1991.pdf
Burns, Steven Morgan (1991) Performance analysis and optimization of asynchronous circuits. Dissertation (Ph.D.), California Institute of Technology. doi:10.7907/kez1-7q52. https://resolver.caltech.edu/CaltechETD:etd-07092007-072640 <https://resolver.caltech.edu/CaltechETD:etd-07092007-072640>
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Summary:Analytical techniques are developed to determine the performance of asynchronous digital circuits. These techniques can be used to guide the designer during the synthesis of such a circuit, leading to a high-performance, efficient implementation. Optimization techniques are also developed that further improve this implementation by determining the optimal sizes of the low-level devices (CMOS transistors) that compose the circuit.