Optimizing the on-chip communication architecture of low power Systems-on-Chip in Deep Sub-Micron technology

Optimizing the on-chip communication architecture of low power Systems-on-Chip in Deep Sub-Micron technology

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Ce mémoire traite des systèmes intégrés sur puce (System-on-Chip) à faible consommation d'énergie tels que ceux qui seront utilisés dans les équipements portables de future génération (ordinateurs de poche (PDA), téléphones mobiles). S'agissant d'équipements alimentés par des batterie...

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Bibliographic Details
Main Author:	Leroy, Anthony
Other Authors:	Verkest Diederik
Format:	Others
Language:	en
Published:	Universite Libre de Bruxelles 2006
Subjects:	deep sub micron system on chip power consumption network on chip
Online Access:	http://theses.ulb.ac.be/ETD-db/collection/available/ULBetd-12202006-202406/

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