FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics

• Main Authors: Vitale, Steven A. (Contributor), Wyatt, Peter W. (Contributor), Checka, Nisha (Contributor), Kedzierski, Jakub T. (Contributor), Keast, Craig L. (Contributor)
• Other Authors: Lincoln Laboratory (Contributor)
• Format: Article
• Language: English
• Published: Institute of Electrical and Electronics Engineers (IEEE), 2012-10-18T20:41:30Z.
• Subjects: Article
• Online Access: Get fulltext

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-on-insulator devices, combined with a workfunction engineered mid-gap metal gate.