A design flow based on modular refinement

• Main Authors: Dave, Nirav H. (Contributor), Ng, Man Cheuk (Contributor), Pellauer, Michael (Contributor), Mithal, Arvind (Contributor)
• Other Authors: Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory (Contributor), Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor)
• Format: Article
• Language: English
• Published: Institute of Electrical and Electronics Engineers, 2012-09-17T18:41:49Z.
• Subjects: Article
• Online Access: Get fulltext

We propose a practical methodology based on modular refinement to design complex systems. The methodology relies on modules with latency-insensitive interfaces so that the refinements can change the timing contract of a module without affecting the overall functional correctness of the system. Such refinements can exacerbate the unit testing problem for modules whose specifications admit a set of output behaviors for the same input (non-determinism), or modules whose input behavior may be affected by past outputs (feedback). We avoid the difficult problem of generating appropriate unit tests for such modules by using system-level tests as unit tests to verify the correctness of refined modules. We illustrate our methodology by showing how one might develop a microprocessor with an in-order pipeline. We then develop a superscalar pipeline using the in-order pipeline as the starting point. Our methodology leverages the effort of design exploration to reduce the effort of specifying interface contracts and unit testing.
National Science Foundation (U.S.) (grant CCF- 0541164 on Complex Digital Systems)