|
|
|
|
| LEADER |
01838 am a22003613u 4500 |
| 001 |
72126 |
| 042 |
|
|
|a dc
|
| 100 |
1 |
0 |
|a Wang, Han
|e author
|
| 100 |
1 |
0 |
|a Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
|e contributor
|
| 100 |
1 |
0 |
|a Massachusetts Institute of Technology. Microsystems Technology Laboratories
|e contributor
|
| 100 |
1 |
0 |
|a Massachusetts Institute of Technology. Research Laboratory of Electronics
|e contributor
|
| 100 |
1 |
0 |
|a Kong, Jing
|e contributor
|
| 100 |
1 |
0 |
|a Wang, Han
|e contributor
|
| 100 |
1 |
0 |
|a Hsu, Allen Long
|e contributor
|
| 100 |
1 |
0 |
|a Lee, Dong Seup
|e contributor
|
| 100 |
1 |
0 |
|a Kim, Ki Kang
|e contributor
|
| 100 |
1 |
0 |
|a Kong, Jing
|e contributor
|
| 100 |
1 |
0 |
|a Palacios, Tomas
|e contributor
|
| 700 |
1 |
0 |
|a Hsu, Allen Long
|e author
|
| 700 |
1 |
0 |
|a Lee, Dong Seup
|e author
|
| 700 |
1 |
0 |
|a Kim, Ki Kang
|e author
|
| 700 |
1 |
0 |
|a Kong, Jing
|e author
|
| 700 |
1 |
0 |
|a Palacios, Tomas
|e author
|
| 245 |
0 |
0 |
|a Delay Analysis of Graphene Field-Effect Transistors
|
| 260 |
|
|
|b Institute of Electrical and Electronics Engineers (IEEE),
|c 2012-08-14T19:01:58Z.
|
| 856 |
|
|
|z Get fulltext
|u http://hdl.handle.net/1721.1/72126
|
| 520 |
|
|
|a In this letter, we analyze the carrier transit delay in graphene field-effect transistors (GFETs).The extraction of the intrinsic delay provides a new way to directly estimate carrier velocity from the experimental data, while the breakdown of the total delay into intrinsic, extrinsic, and parasitic components can offer valuable information for optimizing RF GFET structures.
|
| 520 |
|
|
|a United States. Office of Naval Research. GATE MURI Project
|
| 520 |
|
|
|a U.S. Army Research Laboratory
|
| 520 |
|
|
|a Microelectronics Advanced Research Corporation (MARCO). MSD Program
|
| 546 |
|
|
|a en_US
|
| 655 |
7 |
|
|a Article
|
| 773 |
|
|
|t IEEE Electron Device Letters
|
