Delay Analysis of Graphene Field-Effect Transistors

• Main Authors: Wang, Han (Contributor), Hsu, Allen Long (Contributor), Lee, Dong Seup (Contributor), Kim, Ki Kang (Contributor), Kong, Jing (Contributor), Palacios, Tomas (Contributor)
• Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor), Massachusetts Institute of Technology. Microsystems Technology Laboratories (Contributor), Massachusetts Institute of Technology. Research Laboratory of Electronics (Contributor)
• Format: Article
• Language: English
• Published: Institute of Electrical and Electronics Engineers (IEEE), 2012-08-14T19:01:58Z.
• Subjects: Article
• Online Access: Get fulltext

In this letter, we analyze the carrier transit delay in graphene field-effect transistors (GFETs).The extraction of the intrinsic delay provides a new way to directly estimate carrier velocity from the experimental data, while the breakdown of the total delay into intrinsic, extrinsic, and parasitic components can offer valuable information for optimizing RF GFET structures.
United States. Office of Naval Research. GATE MURI Project
U.S. Army Research Laboratory
Microelectronics Advanced Research Corporation (MARCO). MSD Program