FPGA Implementation of RSA Public-Key Cryptographic Coprocessor

The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modul...

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Bibliographic Details
Main Authors: Hani, Mohamed Khalil (Author), Shaikh-Husin, Nasir (Author), Tan, Siang Lin (Author)
Format: Article
Language:English
Published: 2000-09-24.
Subjects:
Online Access:Get fulltext
LEADER 01383 am a22001573u 4500
001 1989
042 |a dc 
100 1 0 |a Hani, Mohamed Khalil  |e author 
700 1 0 |a Shaikh-Husin, Nasir  |e author 
700 1 0 |a Tan, Siang Lin  |e author 
245 0 0 |a FPGA Implementation of RSA Public-Key Cryptographic Coprocessor 
260 |c 2000-09-24. 
856 |z Get fulltext  |u http://eprints.utm.my/id/eprint/1989/1/ShaikhHusin2000_FGPAImplementationOf_RSAPublic.pdf 
520 |a The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modular multiplication based on the algorithm of Montgomery (1985) is proposed. The design is targeted for implementation in reconfigurable logic, which can yield custom-hardware performance yet maintains all the flexibility of software-based systems. Reconfigurable computing allows the designer to respond, in the prototyping stage, to flaws discovered in implementation or to changes in standards or data formats. We report the issues involved in the preliminary design of the prototype to be fabricated in Altera FLEX10KE series FPGA mounted on a PCI card 
546 |a en 
650 0 4 |a TK Electrical engineering. Electronics Nuclear engineering