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|a Radio Frequency Identification (RFID) technology has brought about revolutionary changes to software system development that supports major applications in advanced business and asset management. Over the years, many RFID applications have been implemented and integrated into the existing system especially in asset management. When the number of RFID devices and system connected to the existing system increases, the network traffic will be overloaded and congested. This would cause problems in reading the RFID tags and could reduce the effectiveness of the existing system in operation. Although many researches have been done on the RFID system, research on formal verification of RFID system has not yet been fully explored. In this thesis, the architecture of a Model Verification Agent (MVA) is presented to verify the processes involved in the RFID utilizations based on the properties of format, syntax and slot of time. In comparison to conventional techniques such as testing and simulation of tracking errors, this thesis proposes a MVA approach to formalize the RFID processes in RFID system. The architecture of MVA is applied on the case study of RFID applications using the MVA to support the verification process. The formal specification language of MVA is designed using Linear Temporal Logic (LTL) and this is supported by the Communication Sequence Processes (CSP) in Concurrency Workbench of New Century (CWB-NC) tool. Two case studies have been used to validate the proposed model; RFID embedded smart card and RFID shopping system. Specifications in the MVA have proven to improve the efficiency of the RFID process based on the properties of the specified RFID system. Finally, the use of MVA has demonstrated that the approach is able to identify errors in the specifications of the RFID system design. This research will assist developers to find errors and improve the implementation of RFID based system developments for various applications.
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