Performance Comparison of Digital Circuits Using Subthreshold Leakage Power Reduction Techniques
Complementary metal-oxide semiconductors (CMOS), stack, sleep and sleepy keeper techniques are used to control sub-threshold leakage. These effective low-power digital circuit design approaches reduce the overall power dissipation. In this paper, the characteristics of inverter, twoinput negative-AN...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Sultan Qaboos University
2017-03-01
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| Series: | The Journal of Engineering Research |
| Subjects: | |
| Online Access: | https://journals.squ.edu.om/index.php/tjer/article/view/188 |