An ESD and Interference-Robust Protection Circuit for Cascode Low-Noise Amplifier in CMOS-SOI Technology

• Main Authors: Min-Su Kim, Heesauk Jhon
• Format: Article
• Language: English
• Published: IEEE 2021-01-01
• Series: IEEE Access
• Subjects: Electrostatic discharge (ESD); interference signal; low-noise amplifier (LNA); time division duplex (TDD); ESD protection circuit; double diode network
• Online Access: https://ieeexplore.ieee.org/document/9432912/

In this paper, we propose a double diode network including an additional stacked diode, which provides robustness against Electrostatic discharge (ESD) and high-frequency interference signals. The proposed stacked diode in the conventional double diode network protects the integrated circuit from instantaneous voltage events by providing an additional current path to the double diode network. Also, it can structurally minimize the parasitic capacitance generated in the diode. The general operating principle and limitation of the conventional double diode network for ESD events and high-frequency interference signals were analyzed and simulated. For experimental verification, a cascode LNA with inductive source degeneration was designed in a 130nm CMOS Silicon-on-insulator (SOI) process for the time-division long-term evolution (TD-LTE) application at the coexistence band. The LNA with the proposed double diode network provides a noise figure of 1.08 dB and a small-signal gain of 18.7 dB at 2.65 GHz (Band 41). And it was measured to be able to protect the internal circuit at 2000 V HBM event, and the RF performances were not affected even with a high-frequency interference signal close to 30 dBm.