Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions
We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. We define a constrained subset of SVAs so that an efficient polynom...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Hindawi Limited
2014-01-01
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| Series: | Journal of Applied Mathematics |
| Online Access: | http://dx.doi.org/10.1155/2014/194574 |