A New Efficient and Reliable Dynamically Reconfigurable Network-on-Chip
We present a new reliable Network-on-Chip (NoC) suitable for Dynamically Reconfigurable Multiprocessors on Chip systems. The proposed NoC is based on routers performing online error detection of routing algorithm and data packet errors. Our work focuses on adaptive routing algorithms which allow to...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Hindawi Limited
2012-01-01
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| Series: | Journal of Electrical and Computer Engineering |
| Online Access: | http://dx.doi.org/10.1155/2012/843239 |