A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes

This paper proposed a single-phase seven-level inverter topology with a simple implementation method for level-shifted modulation schemes, which includes two novelty work. One aspect of the work is the proposed inverter topology that integrates a three-time step-up ratio and capacitor voltage self-b...

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Main Authors: Jianfei Chen, Caisheng Wang, Jian Li
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/8862817/
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spelling doaj-f71467d906a64c8e8e866d64e536f0b92021-03-30T00:34:46ZengIEEEIEEE Access2169-35362019-01-01714655214656510.1109/ACCESS.2019.29462388862817A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation SchemesJianfei Chen0https://orcid.org/0000-0001-9291-5926Caisheng Wang1Jian Li2Department of Electrical and Computer Engineering, Wayne State University, Detroit, MI, USADepartment of Electrical and Computer Engineering, Wayne State University, Detroit, MI, USAState Key Laboratory of Power Transmission Equipment and System Security and New Technology, Chongqing University, Chongqing, ChinaThis paper proposed a single-phase seven-level inverter topology with a simple implementation method for level-shifted modulation schemes, which includes two novelty work. One aspect of the work is the proposed inverter topology that integrates a three-time step-up ratio and capacitor voltage self-balance capability. Compared to the existing single-phase seven-level inverters, the proposed inverter reduces the number of power switches and the voltage stresses across them. The other aspect of the work is a new way to implement level-shifted modulation schemes (level-shifted carrier modulation scheme and level-shifted sine modulation scheme) by three basic steps: (1) obtaining modulation logic based on Karnaugh Map technique; (2) determining a level-shifted modulation scheme; and (3) software implementation using the general-purpose input output(GPIO) terminals and CPU timer interruption function of a DSP chip. Therefore, complex trigonometric calculations of the traditional implementation methods for carrier modulation schemes are replaced by simple logic operations of the proposed implementation method, and thus extra logic chips used in the traditional implementation methods are not necessary for the proposed implementation method. Both simulation and experimental results are presented to verify the proposed inverter topology and the proposed implementation method for level-shifted modulation schemes.https://ieeexplore.ieee.org/document/8862817/Seven-levelstep-upcarrier modulationKarnaugh mapGPIO
collection DOAJ
language English
format Article
sources DOAJ
author Jianfei Chen
Caisheng Wang
Jian Li
spellingShingle Jianfei Chen
Caisheng Wang
Jian Li
A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
IEEE Access
Seven-level
step-up
carrier modulation
Karnaugh map
GPIO
author_facet Jianfei Chen
Caisheng Wang
Jian Li
author_sort Jianfei Chen
title A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
title_short A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
title_full A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
title_fullStr A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
title_full_unstemmed A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes
title_sort single-phase step-up seven-level inverter with a simple implementation method for level-shifted modulation schemes
publisher IEEE
series IEEE Access
issn 2169-3536
publishDate 2019-01-01
description This paper proposed a single-phase seven-level inverter topology with a simple implementation method for level-shifted modulation schemes, which includes two novelty work. One aspect of the work is the proposed inverter topology that integrates a three-time step-up ratio and capacitor voltage self-balance capability. Compared to the existing single-phase seven-level inverters, the proposed inverter reduces the number of power switches and the voltage stresses across them. The other aspect of the work is a new way to implement level-shifted modulation schemes (level-shifted carrier modulation scheme and level-shifted sine modulation scheme) by three basic steps: (1) obtaining modulation logic based on Karnaugh Map technique; (2) determining a level-shifted modulation scheme; and (3) software implementation using the general-purpose input output(GPIO) terminals and CPU timer interruption function of a DSP chip. Therefore, complex trigonometric calculations of the traditional implementation methods for carrier modulation schemes are replaced by simple logic operations of the proposed implementation method, and thus extra logic chips used in the traditional implementation methods are not necessary for the proposed implementation method. Both simulation and experimental results are presented to verify the proposed inverter topology and the proposed implementation method for level-shifted modulation schemes.
topic Seven-level
step-up
carrier modulation
Karnaugh map
GPIO
url https://ieeexplore.ieee.org/document/8862817/
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