Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions
The high reliability of electroplating through silicon vias (TSVs) is an attractive hotspot in the application of high-density integrated circuit packaging. In this paper, improvements for fully filled TSVs by optimizing sputtering and electroplating conditions were introduced. Particular attention...
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doaj-f633ed17229640d5b870fa2790bb92382020-11-25T01:35:03ZengMDPI AGMaterials1996-19442019-11-011222371310.3390/ma12223713ma12223713Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating ConditionsFei Zhao0The 54th Research Institute of China Electronics Technology Group Corporation, Shijiazhuang 050081, ChinaThe high reliability of electroplating through silicon vias (TSVs) is an attractive hotspot in the application of high-density integrated circuit packaging. In this paper, improvements for fully filled TSVs by optimizing sputtering and electroplating conditions were introduced. Particular attention was paid to the samples with different seed layer structures. These samples were fabricated by different sputtering and treatment approaches, and accompanied with various electroplating profile adjustments. The images were observed and characterized by X-ray equipment and a scanning electron microscope (SEM). The results show that optimized sputtering and electroplating conditions can help improve the quality of TSVs, which could be interpreted as the interface effect of the TSV structure.https://www.mdpi.com/1996-1944/12/22/3713tsvssputteringelectroplatinginterface effect |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Fei Zhao |
spellingShingle |
Fei Zhao Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions Materials tsvs sputtering electroplating interface effect |
author_facet |
Fei Zhao |
author_sort |
Fei Zhao |
title |
Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions |
title_short |
Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions |
title_full |
Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions |
title_fullStr |
Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions |
title_full_unstemmed |
Improvement on Fully Filled Through Silicon Vias by Optimized Sputtering and Electroplating Conditions |
title_sort |
improvement on fully filled through silicon vias by optimized sputtering and electroplating conditions |
publisher |
MDPI AG |
series |
Materials |
issn |
1996-1944 |
publishDate |
2019-11-01 |
description |
The high reliability of electroplating through silicon vias (TSVs) is an attractive hotspot in the application of high-density integrated circuit packaging. In this paper, improvements for fully filled TSVs by optimizing sputtering and electroplating conditions were introduced. Particular attention was paid to the samples with different seed layer structures. These samples were fabricated by different sputtering and treatment approaches, and accompanied with various electroplating profile adjustments. The images were observed and characterized by X-ray equipment and a scanning electron microscope (SEM). The results show that optimized sputtering and electroplating conditions can help improve the quality of TSVs, which could be interpreted as the interface effect of the TSV structure. |
topic |
tsvs sputtering electroplating interface effect |
url |
https://www.mdpi.com/1996-1944/12/22/3713 |
work_keys_str_mv |
AT feizhao improvementonfullyfilledthroughsiliconviasbyoptimizedsputteringandelectroplatingconditions |
_version_ |
1725068883552894976 |