Multi-Objective Hierarchical Optimization: A Design Framework for Grid-Connected Interleaved H-Bridges

The paralleling of power converters connected to the grid for power-sharing is a widely used technique. In this context, the design framework for a low-cost, lightweight, compact and high-performance optimum configuration is an open problem. This paper proposes an innovative Multi-Objective Hierarch...

Full description

Bibliographic Details
Main Authors: Rama Krishna Naidu Vaddipalli, Luiz A. C. Lopes
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Open Journal of the Industrial Electronics Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9409631/
Description
Summary:The paralleling of power converters connected to the grid for power-sharing is a widely used technique. In this context, the design framework for a low-cost, lightweight, compact and high-performance optimum configuration is an open problem. This paper proposes an innovative Multi-Objective Hierarchical Optimization Design Framework (MO-HO-DF) for an AC grid interface with <inline-formula><tex-math notation="LaTeX">$N$</tex-math></inline-formula> interleaved H-bridges, each with <inline-formula><tex-math notation="LaTeX">$M$</tex-math></inline-formula> parallel &#x201C;to-be-determined&#x201D; switches, connected through coupling inductances (<inline-formula><tex-math notation="LaTeX">$L_f$</tex-math></inline-formula>). A total of eight figures of merit (FOMs) were identified for the design framework optimization. A rigorous model of the power electronic system is presented. Next, a highly computationally efficient algorithm for the estimation of the required frequency modulation ratio (<inline-formula><tex-math notation="LaTeX">$m_f$</tex-math></inline-formula>) to meet current harmonic performance requirements for any given configuration is proposed. Then, the concept and implementation of the algorithm are presented for the MO-HO-DF. The effectiveness of the design optimization framework is demonstrated by comparing it to a base case solution. Finally, the design calculations are validated via PLECS simulation with manufacturer-provided 3D power semiconductor models that include thermal modelling.
ISSN:2644-1284