Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs). First, the QCCM10T cell consisting of four cross-coupled input-split inverters is proposed. The cell achieves full...
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doaj-f3c36cff5a584bb59237659888d3c8e22021-03-30T00:28:52ZengIEEEIEEE Access2169-35362019-01-01717618817619610.1109/ACCESS.2019.29581098926454Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node UpsetsAibin Yan0https://orcid.org/0000-0003-0024-987XJun Zhou1https://orcid.org/0000-0002-8340-3547Yuanjie Hu2https://orcid.org/0000-0003-3886-8158Jie Cui3https://orcid.org/0000-0001-7258-3418Zhengfeng Huang4https://orcid.org/0000-0001-8239-5058Patrick Girard5https://orcid.org/0000-0003-0722-8772Xiaoqing Wen6https://orcid.org/0000-0001-8305-604XAnhui Engineering Laboratory of IoT Security Technologies, School of Computer Science and Technology, Anhui University, Hefei, ChinaAnhui Engineering Laboratory of IoT Security Technologies, School of Computer Science and Technology, Anhui University, Hefei, ChinaAnhui Engineering Laboratory of IoT Security Technologies, School of Computer Science and Technology, Anhui University, Hefei, ChinaAnhui Engineering Laboratory of IoT Security Technologies, School of Computer Science and Technology, Anhui University, Hefei, ChinaSchool of Electronic Science and Applied Physics, Hefei University of Technology, Hefei, ChinaLaboratory of Informatics, Robotics and Microelectronics of Montpellier, University of Montpellier/CNRS, Montpellier, FranceGraduate School of Computer Science and Systems Engineering, Kyushu Institute of Technology, Fukuoka, JapanThis paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs). First, the QCCM10T cell consisting of four cross-coupled input-split inverters is proposed. The cell achieves full SEU tolerance and partial DNU tolerance through a novel feedback mechanism among its internal nodes. It also has a low cost in terms of area and power dissipation mainly due to the use of only a few transistors. Next, based on the QCCM10T cell, the QCCM12T cell is proposed that uses two extra access transistors. The QCCM12T cell has a reduced read-and-write access time with the same soft error tolerance when compared to the QCCM10T cell. Simulation results demonstrate the robustness of the proposed memory cells. Moreover, compared with the state-of-the-art hardened memory cells, the proposed QCCM12T cell saves 28.59% write access time, 55.83% read access time, and 4.46% power dissipation at the cost of 4.04% silicon area on average.https://ieeexplore.ieee.org/document/8926454/Double-node upsetmemory cellradiation hardeningsingle event upsetsoft error |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Aibin Yan Jun Zhou Yuanjie Hu Jie Cui Zhengfeng Huang Patrick Girard Xiaoqing Wen |
spellingShingle |
Aibin Yan Jun Zhou Yuanjie Hu Jie Cui Zhengfeng Huang Patrick Girard Xiaoqing Wen Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets IEEE Access Double-node upset memory cell radiation hardening single event upset soft error |
author_facet |
Aibin Yan Jun Zhou Yuanjie Hu Jie Cui Zhengfeng Huang Patrick Girard Xiaoqing Wen |
author_sort |
Aibin Yan |
title |
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets |
title_short |
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets |
title_full |
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets |
title_fullStr |
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets |
title_full_unstemmed |
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets |
title_sort |
novel quadruple cross-coupled memory cell designs with protection against single event upsets and double-node upsets |
publisher |
IEEE |
series |
IEEE Access |
issn |
2169-3536 |
publishDate |
2019-01-01 |
description |
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs). First, the QCCM10T cell consisting of four cross-coupled input-split inverters is proposed. The cell achieves full SEU tolerance and partial DNU tolerance through a novel feedback mechanism among its internal nodes. It also has a low cost in terms of area and power dissipation mainly due to the use of only a few transistors. Next, based on the QCCM10T cell, the QCCM12T cell is proposed that uses two extra access transistors. The QCCM12T cell has a reduced read-and-write access time with the same soft error tolerance when compared to the QCCM10T cell. Simulation results demonstrate the robustness of the proposed memory cells. Moreover, compared with the state-of-the-art hardened memory cells, the proposed QCCM12T cell saves 28.59% write access time, 55.83% read access time, and 4.46% power dissipation at the cost of 4.04% silicon area on average. |
topic |
Double-node upset memory cell radiation hardening single event upset soft error |
url |
https://ieeexplore.ieee.org/document/8926454/ |
work_keys_str_mv |
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