Characterization of the Neuroinflammatory Response to Thiol-ene Shape Memory Polymer Coated Intracortical Microelectrodes

• Main Authors: Andrew J. Shoffstall, Melanie Ecker, Vindhya Danda, Alexandra Joshi-Imre, Allison Stiller, Marina Yu, Jennifer E. Paiz, Elizabeth Mancuso, Hillary W. Bedell, Walter E. Voit, Joseph J. Pancrazio, Jeffrey R. Capadona
• Format: Article
• Language: English
• Published: MDPI AG 2018-09-01
• Series: Micromachines
• Subjects: intracortical; microelectrodes; shape-memory-polymer; electrophysiology
• Online Access: http://www.mdpi.com/2072-666X/9/10/486

Thiol-ene based shape memory polymers (SMPs) have been developed for use as intracortical microelectrode substrates. The unique chemistry provides precise control over the mechanical and thermal glass-transition properties. As a result, SMP substrates are stiff at room temperature, allowing for insertion into the brain without buckling and subsequently soften in response to body temperatures, reducing the mechanical mismatch between device and tissue. Since the surface chemistry of the materials can contribute significantly to the ultimate biocompatibility, as a first step in the characterization of our SMPs, we sought to isolate the biological response to the implanted material surface without regards to the softening mechanics. To accomplish this, we tightly controlled for bulk stiffness by comparing bare silicon ‘dummy’ devices to thickness-matched silicon devices dip-coated with SMP. The neuroinflammatory response was evaluated after devices were implanted in the rat cortex for 2 or 16 weeks. We observed no differences in the markers tested at either time point, except that astrocytic scarring was significantly reduced for the dip-coated implants at 16 weeks. The surface properties of non-softening thiol-ene SMP substrates appeared to be equally-tolerated and just as suitable as silicon for neural implant substrates for applications such as intracortical microelectrodes, laying the groundwork for future softer devices to improve upon the prototype device performance presented here.