Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing

• Main Authors: Ignacio Bravo, Jorge García, Felipe Espinosa, José L. Lázaro, Alfredo Gardel, Javier Baliñas
• Format: Article
• Language: English
• Published: MDPI AG 2011-02-01
• Series: Sensors
• Subjects: FPGA; CMOS sensor; Ethernet; intelligent camera
• Online Access: http://www.mdpi.com/1424-8220/11/3/2282/

This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely.