FPGA Realization of the Parameter-Switching Method in the Chen Oscillator and Application in Image Transmission

In this paper, the parameter-switching technique was applied to control chaos in the Chen oscillator and as a decryption mechanism in a secure transmission system, to transmit RGB and grayscale images. In the past few decades, considerable efforts have been put into the study of the stabilization of...

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Bibliographic Details
Main Authors: Vincent-Ademola Adeyemi, Jose-Cruz Nuñez-Perez, Yuma Sandoval Ibarra, Francisco-Javier Perez-Pinal, Esteban Tlelo-Cuautle
Format: Article
Language:English
Published: MDPI AG 2021-05-01
Series:Symmetry
Subjects:
Online Access:https://www.mdpi.com/2073-8994/13/6/923
Description
Summary:In this paper, the parameter-switching technique was applied to control chaos in the Chen oscillator and as a decryption mechanism in a secure transmission system, to transmit RGB and grayscale images. In the past few decades, considerable efforts have been put into the study of the stabilization of chaotic dynamical systems. Most of the well-known chaos control methods, such as Ott, Grebogi, and Yorke (OGY), Pyragas, and open-loop methods, force an unstable periodic orbit into a stable one while distorting the original attractor. On the other hand, the parameter-switching technique is an elegant method that can synthesize an already-existing stable orbit, thereby preserving the underlying attractor. Consequently, the main contributions of this work were the FPGA realizations of the parameter-switching method and a secure image transmission system using a synchronized master and slave topology. The results of the parameter-switching technique and synchronization were verified using phase plots and time series. The chaos-encrypted image from the image transmission system, verified using correlation, showed no relativity with the original image, while the recovery of the decrypted image has no loss of quality. The encryption and decryption system was symmetric, whereby the key was private. In this work, co-simulations were performed in Active-HDL with MATLAB/Simulink, while the target FPGA board was the Xilinx’s Artix-7 AC701.
ISSN:2073-8994