A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers

The introduction of new mobile communication standards, enabling the ever growing amount of data transmitted in mobile communication networks, continuously increases the complexity of control processing within radio frequency (RF) transceivers. Since this complexity cannot be handled by traditional...

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Main Authors: Siegfried Brandstatter, Mario Huemer
Format: Article
Language:English
Published: IEEE 2014-01-01
Series:IEEE Access
Online Access:https://ieeexplore.ieee.org/document/6870422/
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spelling doaj-e6a7a60e0eee422b979f8ef6b8c0c2b82021-03-29T19:30:09ZengIEEEIEEE Access2169-35362014-01-01277178710.1109/ACCESS.2014.23451946870422A Novel MPSoC Interface and Control Architecture for Multistandard RF TransceiversSiegfried Brandstatter0Mario Huemer1 Danube Mobile Communications Engineering GmbH and Company, KG., Linz, AustriaInstitute of Signal Processing, Johannes Kepler University Linz, Linz, AustriaThe introduction of new mobile communication standards, enabling the ever growing amount of data transmitted in mobile communication networks, continuously increases the complexity of control processing within radio frequency (RF) transceivers. Since this complexity cannot be handled by traditional approaches, this paper focuses on the partitioning of RF transceiver systems and on the implementation of application-specific components to introduce an advanced multiprocessor system-on-chip interface and control architecture which is able to fulfill the requirements of future RF transceiver integrations. The proposed framework demonstrates a high degree of scalability, flexibility, and reusability. Consequently, the time to market for products can be reduced and fast adaptations to the requirements of the market are feasible. In addition, the developed application-specific components achieve improved or at least equivalent performance results compared with common architectures while the silicon area can be reduced. This characteristic has positive effects on the costs as well as on the power consumption of the RF transceiver.https://ieeexplore.ieee.org/document/6870422/
collection DOAJ
language English
format Article
sources DOAJ
author Siegfried Brandstatter
Mario Huemer
spellingShingle Siegfried Brandstatter
Mario Huemer
A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
IEEE Access
author_facet Siegfried Brandstatter
Mario Huemer
author_sort Siegfried Brandstatter
title A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
title_short A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
title_full A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
title_fullStr A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
title_full_unstemmed A Novel MPSoC Interface and Control Architecture for Multistandard RF Transceivers
title_sort novel mpsoc interface and control architecture for multistandard rf transceivers
publisher IEEE
series IEEE Access
issn 2169-3536
publishDate 2014-01-01
description The introduction of new mobile communication standards, enabling the ever growing amount of data transmitted in mobile communication networks, continuously increases the complexity of control processing within radio frequency (RF) transceivers. Since this complexity cannot be handled by traditional approaches, this paper focuses on the partitioning of RF transceiver systems and on the implementation of application-specific components to introduce an advanced multiprocessor system-on-chip interface and control architecture which is able to fulfill the requirements of future RF transceiver integrations. The proposed framework demonstrates a high degree of scalability, flexibility, and reusability. Consequently, the time to market for products can be reduced and fast adaptations to the requirements of the market are feasible. In addition, the developed application-specific components achieve improved or at least equivalent performance results compared with common architectures while the silicon area can be reduced. This characteristic has positive effects on the costs as well as on the power consumption of the RF transceiver.
url https://ieeexplore.ieee.org/document/6870422/
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