Estimation and Correction of Gain Mismatch and Timing Error in Time-Interleaved ADCs Based on DFT

Estimation and Correction of Gain Mismatch and Timing Error in Time-Interleaved ADCs Based on DFT

Time-interleaved analog-to-digital converter (ADC) architecture is crucial to increase the maximum sample rate. However, offset mismatch, gain mismatch, and timing error between time-interleaved channels degrade the performance of time-interleaved ADCs. This paper focuses on the gain mismatch and ti...

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Bibliographic Details
Main Authors: Guo Lianping, Tian Shulin, Wang Zhigang
Format: Article
Language:English
Published: Polish Academy of Sciences 2014-08-01
Series:Metrology and Measurement Systems
Subjects:
correction
estimation
gain mismatch
time-interleaved analog-to-digital converter
timing error
Online Access:http://www.degruyter.com/view/j/mms.2014.21.issue-3/mms-2014-0045/mms-2014-0045.xml?format=INT
Description
Summary:Time-interleaved analog-to-digital converter (ADC) architecture is crucial to increase the maximum sample rate. However, offset mismatch, gain mismatch, and timing error between time-interleaved channels degrade the performance of time-interleaved ADCs. This paper focuses on the gain mismatch and timing error. Techniques based on Discrete Fourier Transform (DFT) for estimating and correcting gain mismatch and timing error in an M-channel ADC are depicted. Numerical simulations are used to verify the proposed estimation and correction algorithm.
ISSN:2300-1941

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