Rapid prototyping of Networks-on-Chip on multi-FPGA platforms
Experimental approaches used for architecture exploration and validation are often based on configurable logic device such as FPGA. NoC architectures require multi-FPGA platforms as the resources of a single FPGA are not big enough. Partitionning a NoC on multi-FPGA requires special techniques for a...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
EDP Sciences
2016-01-01
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| Series: | MATEC Web of Conferences |
| Online Access: | http://dx.doi.org/10.1051/matecconf/20165412002 |