INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING
The question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals....
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The United Institute of Informatics Problems of the National Academy of Sciences of Belarus
2016-09-01
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Series: | Informatika |
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doaj-e1a54339b00743fb81e53ab5db9ec73a2021-07-28T21:07:21ZrusThe United Institute of Informatics Problems of the National Academy of Sciences of Belarus Informatika1816-03012016-09-010111912831INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELININGYu. V. Pottosin0S. N. Kardash1Объединенный институт проблем информатики НАН БеларусиОбъединенный институт проблем информатики НАН БеларусиThe question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals. To solve this problem we use a model based on representation of combinational circuit as a directed graph. In the process of solving this problem, the frequency of incoming signals is established. This frequency must be as high as possible.https://inf.grid.by/jour/article/view/32 |
collection |
DOAJ |
language |
Russian |
format |
Article |
sources |
DOAJ |
author |
Yu. V. Pottosin S. N. Kardash |
spellingShingle |
Yu. V. Pottosin S. N. Kardash INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING Informatika |
author_facet |
Yu. V. Pottosin S. N. Kardash |
author_sort |
Yu. V. Pottosin |
title |
INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
title_short |
INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
title_full |
INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
title_fullStr |
INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
title_full_unstemmed |
INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
title_sort |
increasing combinational circuit performance via pipelining |
publisher |
The United Institute of Informatics Problems of the National Academy of Sciences of Belarus |
series |
Informatika |
issn |
1816-0301 |
publishDate |
2016-09-01 |
description |
The question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals. To solve this problem we use a model based on representation of combinational circuit as a directed graph. In the process of solving this problem, the frequency of incoming signals is established. This frequency must be as high as possible. |
url |
https://inf.grid.by/jour/article/view/32 |
work_keys_str_mv |
AT yuvpottosin increasingcombinationalcircuitperformanceviapipelining AT snkardash increasingcombinationalcircuitperformanceviapipelining |
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