Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices
In a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is...
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doaj-e05f7b87a4d148ef96855121f74968132021-01-16T00:01:11ZengMDPI AGApplied System Innovation2571-55772021-01-0145510.3390/asi4010005Study of a Synchronization System for Distributed Inverters Conceived for FPGA DevicesLeonardo Saccenti0Valentina Bianchi1Ilaria De Munari2Department of Engineering and Architecture, University of Parma, Parco Area delle Scienze, 181/A, 43124 Parma, ItalyDepartment of Engineering and Architecture, University of Parma, Parco Area delle Scienze, 181/A, 43124 Parma, ItalyDepartment of Engineering and Architecture, University of Parma, Parco Area delle Scienze, 181/A, 43124 Parma, ItalyIn a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is presented. Each of the inverters, connected in parallel, is conceived to be equipped with an FPGA that controls the Pulse-Width Modulation (PWM) waveform without intercommunication with the others. The hardware implemented is the same for every inverter; therefore, the addition of a new module does not require redesign, enhancing system modularity. The system has been simulated in a Simulink environment. To study its behavior and to improve the control method, simulations with two parallel-connected inverters have been firstly conducted, then additional simulations have been performed with increasing complexity to demonstrate the quality of the algorithm. The results prove the ability of the method proposed to limit the circulating currents to negligible values.https://www.mdpi.com/2571-5577/4/1/5smart gridFPGAparallel inverterscirculating current |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Leonardo Saccenti Valentina Bianchi Ilaria De Munari |
spellingShingle |
Leonardo Saccenti Valentina Bianchi Ilaria De Munari Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices Applied System Innovation smart grid FPGA parallel inverters circulating current |
author_facet |
Leonardo Saccenti Valentina Bianchi Ilaria De Munari |
author_sort |
Leonardo Saccenti |
title |
Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices |
title_short |
Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices |
title_full |
Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices |
title_fullStr |
Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices |
title_full_unstemmed |
Study of a Synchronization System for Distributed Inverters Conceived for FPGA Devices |
title_sort |
study of a synchronization system for distributed inverters conceived for fpga devices |
publisher |
MDPI AG |
series |
Applied System Innovation |
issn |
2571-5577 |
publishDate |
2021-01-01 |
description |
In a multiple parallel-connected inverters system, limiting the circulating current phenomenon is mandatory since it may influence efficiency and reliability. In this paper, a new control method aimed at this purpose and conceived to be implemented on a Field Programmable Gate Array (FPGA) device is presented. Each of the inverters, connected in parallel, is conceived to be equipped with an FPGA that controls the Pulse-Width Modulation (PWM) waveform without intercommunication with the others. The hardware implemented is the same for every inverter; therefore, the addition of a new module does not require redesign, enhancing system modularity. The system has been simulated in a Simulink environment. To study its behavior and to improve the control method, simulations with two parallel-connected inverters have been firstly conducted, then additional simulations have been performed with increasing complexity to demonstrate the quality of the algorithm. The results prove the ability of the method proposed to limit the circulating currents to negligible values. |
topic |
smart grid FPGA parallel inverters circulating current |
url |
https://www.mdpi.com/2571-5577/4/1/5 |
work_keys_str_mv |
AT leonardosaccenti studyofasynchronizationsystemfordistributedinvertersconceivedforfpgadevices AT valentinabianchi studyofasynchronizationsystemfordistributedinvertersconceivedforfpgadevices AT ilariademunari studyofasynchronizationsystemfordistributedinvertersconceivedforfpgadevices |
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