Tunnel field-effect transistor with two gated intrinsic regions
In this paper, we propose and validate (using simulations) a novel design of silicon tunnel field-effect transistor (TFET), based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conv...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
AIP Publishing LLC
2014-07-01
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| Series: | AIP Advances |
| Online Access: | http://dx.doi.org/10.1063/1.4889889 |